发明名称 低応力ビア
摘要 A component can include a substrate having a front surface and a rear surface remote therefrom, an opening extending from the rear surface towards the front surface, and a conductive via extending within the opening. The substrate can have a CTE less than 10 ppm/° C. The opening can define an inner surface between the front and rear surfaces. The conductive via can include a first metal layer overlying the inner surface and a second metal region overlying the first metal layer and electrically coupled to the first metal layer. The second metal region can have a CTE greater than a CTE of the first metal layer. The conductive via can have an effective CTE across a diameter of the conductive via that is less than 80% of the CTE of the second metal region.
申请公布号 JP6058664(B2) 申请公布日期 2017.01.11
申请号 JP20140522989 申请日期 2012.07.26
申请人 テセラ インコーポレイテッドTessera, Inc. 发明人 モハメド イリヤス;ハーバ ベルガセム;ウゾ キプリアン
分类号 H01L21/3205;H01L21/768;H01L23/12;H01L23/522 主分类号 H01L21/3205
代理机构 代理人
主权项
地址