| 摘要 |
<p>PURPOSE:To attain miniaturization and to reduce cost by realizing a DLL (delay locked loop) of a synchronization following device used for a reception section of communication employing the spread spectrum (SS) system with a simple system. CONSTITUTION:A base band signal and an Early pseudo noise series are multiplied by a multiplier 2 to output phase lead data ai, the base band signal and a Late pseudo noise series are multiplied by a multiplier 3 to output phase lag data bi, the lead phase data and the lag phase data are added by an adder 5, an output of the adder 5 and the lag phase data are inputted to an up/down counter 6 and they are subject to up/down count by using the sum output as a clock and the lag phase data as an up/down control signal. Thus, the same operation as a conventional system in which integration of ai-bi resulting from the sum of the data ai and the inverted bi is implemented is executed only in the case of ai not equal to bi.</p> |
