METHOD AND SYSTEM FOR SMART CARD CHIP PERSONALIZATION

摘要

A method and system configured for personalizing at least one chip (IC), intended to be integrated into a smart card, comprising a tester (T) associated to a (Field Programmable Gate Array) FPGA device (WB) connected to the chip (IC), the chip (IC) being part of a wafer (W) comprising an arrangement of a plurality of chips and a disposable hardware module (HM) for verifying presence of the chip (IC) on the wafer (W). The tester (T) sends a first secret code (S1) to the FPGA device (WB), which sends a command (C) to the chip to initiate a test mode activation. The FPGA device (WB) encrypts a second secret code (S2) by using a secret encryption algorithm (E) parameterized with a true random number (R) received from the chip (IC) and the first secret code (S1) to obtain a first cryptogram M1 which is sent to the chip (IC). The chip (IC) determines a second cryptogram (M2) by carrying out a Boolean function (F) over a result obtained by decryption of the first cryptogram (M1) using the inverse of the secret encryption algorithm (E -1 ) parameterized with the random number (R) and the first secret code (S1). The second cryptogram (M2) is compared with a calculated result F(S2) obtained by carrying out the Boolean function (F) over the second secret code (S2) temporarily stored on the chip (IC). The FPGA device (WB) performs personalization of the chip (IC) only if the test mode of the chip (IC) is enabled by a successful comparison between the second cryptogram (M2) and the calculated result F(S2).