High voltage LDMOS device with an increased voltage at source (high side) and a fabricating method thereof

摘要

A high voltage LDMOS device having high side source voltage, an n type buried layer and a p type buried layer situated on the interface between a p type substrate and an n type epitaxial layer; a lateral surface of the n type buried layer and a lateral surface of the p type buried layer not in contact, and are distant from one another with a distance, thereby increasing the withstand voltage between the n type buried layer and the p type buried layer; the p type buried layer and the drain overlap at least partially in a vertical direction, enabling the p type buried layer to exert a reduced surface field action on the drain, to increase the withstand voltage of the drain against the source; the source and the body terminal centrally on top of the n type buried layer.

主权项

1. A high voltage LDMOS device with a high side source voltage, the LDMOS device comprises:
a bowl shaped isolating ring surrounding the LDMOS device;the isolating ring comprises an n type buried layer and a p type buried layer along an interface between a p type substrate and an n type epitaxial layer, and a p well on top of the p type buried layer;
a lateral surface of the n type buried layer and a lateral surface of the p type buried layer are not in contact with one another, and are distant from one another with a distance, thereby withstanding an increased voltage between the n type buried layer and the p type buried layer; the p type buried layer and a drain overlap at least partially in a vertical direction, thus enabling the p type buried layer to exert a reduced surface field action on the drain, so as to withstand an increased voltage of the drain against a source; and the n type buried layer is in the center bottom of the source and a body terminal, so that the source and the body terminal are high voltage isolated from the p type substrate.