发明名称 Method for synchronizing an isochronous system with a higher-ranking clock pulse system
摘要 A method for synchronizing a basic clock pulse system having a plurality of synchronized components with a higher-ranking clock pulse system includes, in a first step of the synchronization, determining a phase difference between an actual phase of the basic clock pulse system and a nominal phase of the higher-ranking clock pulse system and transmitting the phase difference to the components of the basic clock pulse system and, in a second step of the synchronization, using the determined phase difference as a pilot control for each component, i.e. for the pilot control of a clock pulse generator of each component.
申请公布号 US9544129(B2) 申请公布日期 2017.01.10
申请号 US201514674937 申请日期 2015.03.31
申请人 SIEMENS AKTIENGESELLSCHAFT 发明人 Gross Markus;Käsdorf Oswald;Schleussinger Armin;Von Der Bank Michael
分类号 H04L7/00;H04L7/04;G05B19/042 主分类号 H04L7/00
代理机构 Henry M. Feiereisen LLC. 代理人 Henry M. Feiereisen LLC.
主权项 1. A method for synchronizing with a higher-ranking clock pulse system an isochronous basic clock pulse system having a plurality of synchronous components, each synchronous component having a clock pulse generator for generating local clock pulses, the method comprising: in a first step of the synchronization, determining a phase difference between an actual phase of the basic clock pulse system and a nominal phase of the higher-ranking clock pulse system and transmitting the phase difference to the components of the basic clock pulse system, in a second step of the synchronization, using the determined phase difference as a pilot control of the clock pulse generator of each synchronous component, and deactivating the pilot control is as soon as the basic clock pulse system has been synchronized with the higher-ranking clock pulse system.
地址 München DE