Semiconductor devices and methods for manufacturing the same

摘要

Semiconductor devices and methods for manufacturing the same are provided. In one embodiment, the method may include: forming a first shielding layer on a substrate, and forming one of source and drain regions with the first shielding layer as a mask; forming a second shielding layer on the substrate, and forming the other of the source and drain regions with the second shielding layer as a mask; removing a portion of the second shielding layer which is next to the other of the source and drain regions; forming a first gate dielectric layer and floating gate layer; forming a mask layer as a spacer on a sidewall of a remaining portion of the second shielding layer, and patterning the floating gate layer with the mask layer as a mask, and then removing the mask layer; and forming a second gate dielectric layer, and forming a gate conductor as a spacer on the sidewall of the remaining portion of the second shielding layer.

主权项

1. A method for manufacturing a semiconductor device, comprising the steps in sequence of:
forming, on a substrate, a first shielding sub-layer on the substrate and also a first spacer on a sidewall of the first shielding sub-layer; forming one of source and drain regions with the first shielding sub-layer together with the first spacer as a mask; forming a second shielding sub-layer on the substrate next to the first spacer and removing the first shielding sub-layer; forming the other of the source and drain regions with the second shielding sub-layer together with the first spacer as a mask; removing the first spacer; forming a first gate dielectric layer and a floating gate layer on the substrate with the second shielding sub-layer left thereon; forming, on the floating gate layer, a mask layer as a spacer on a sidewall of the second shielding sub-layer, and patterning the floating gate layer with the mask layer as a mask, and then removing the mask layer; and forming a second gate dielectric layer on the first gate dielectric layer and the patterned floating gate layer, and forming, on the second gate dielectric layer, a gate conductor as a spacer on the sidewall of the second shielding sub-layer.