Lateral double diffusion metal-oxide-semiconductor (LDMOS) transistors and fabrication method thereof

摘要

A lateral double diffusion metal-oxide-semiconductor (LDMOS) transistor is provided. The LDMOS transistor includes a semiconductor substrate having a well region and a drain region in the well region. The LDMOS transistor also includes at least one drifting region in the well region and an annular source region in the drifting region surrounding the drain region. Further, the LDMOS transistor includes at least one annular isolation structure surrounding the drain region in the drifting region. Further, the LDMOS transistor also includes an annular gate dielectric layer on the well region and an annular gate on the annular gate dielectric layer.

主权项

1. A lateral double diffusion metal-oxide-semiconductor transistor, comprising:
a semiconductor substrate having a well region; at least one drifting region in the well region; a drain region in the drifting region; an annular gate dielectric layer on the well region and surrounding the drain region in the substrate; an annular gate on the annular gate dielectric layer, the annular gate surrounding the drain region in the substrate; at least one annular isolation structure in the drifting region and surrounding the drain region; an annular source region in the well region surrounding the drain region and surrounding at least one annular isolation structure; an annular lightly doped region in the well region at an outer side of the annular gate, the annular lightly doped region including the annular source region; and an annular channel region formed between the drain region and the annular source region, wherein: the annular lightly doped region and the drifting region are in the well region and separated by a distance in the well region; the drifting region and an edge of an inner side of the annular gate have an overlap along a direction vertical to a top surface of the semiconductor substrate; the at least one annular isolation structure includes a first annular isolation structure formed in a first drifting region at an inner side of the annular gate, and a second annular isolation structure formed in a second drifting region at an outer side of the annular gate, the second annular isolation structure surrounding the first annular isolation structure; and a most outer annular isolation structure and one side of the annular gate have an overlap along a direction vertical to the top surface of the semiconductor substrate.