发明名称 Co-designed dynamic language accelerator for a processor
摘要 In an embodiment, a processor includes at least one core and a dynamic language accelerator to execute a bytecode responsive to a memory mapped input/output (MMIO) operation on a file descriptor associated with the dynamic language accelerator. The processor may block execution of native code while the dynamic language accelerator executes the bytecode. Other embodiments are described and claimed.
申请公布号 US9542211(B2) 申请公布日期 2017.01.10
申请号 US201414225755 申请日期 2014.03.26
申请人 Intel Corporation 发明人 Wang Cheng;Wu Youfeng;Rong Hongbo;Park Hyunchul
分类号 G06F9/45;G06F9/455;G06F13/10;G06F9/44 主分类号 G06F9/45
代理机构 Trop, Pruner & Hu, P.C. 代理人 Trop, Pruner & Hu, P.C.
主权项 1. A system comprising: a processor to execute instructions, the processor including at least one core and a dynamic language accelerator to execute bytecode responsive to a memory mapped input/output (MMIO) operation on a file descriptor associated with the dynamic language accelerator, the dynamic language accelerator to receive a pathname from a virtual machine, the pathname to associate the file descriptor with the dynamic language accelerator, wherein the processor is to block execution of native code on the at least one core while the dynamic language accelerator executes is to execute the bytecode and configure, via a system call, a mapping on a native state of the processor to a virtual machine state of a virtual machine that is to trigger the dynamic language accelerator, the virtual machine a state including a bytecode state, and the processor is to associate an identifier with the virtual machine state, the processor further comprising an accelerator native interface coupled to the dynamic language accelerator, where the dynamic language accelerator is to call back to a native library via the accelerator native interface, wherein the processor is to execute a function for the virtual machine using the native library and to continue execution of the bytecode in the dynamic language accelerator after the function is executed; and system memory coupled to a processor.
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