Three dimensional memory device with epitaxial semiconductor pedestal for peripheral transistors

摘要

An alternating stack of insulator layers and spacer material layers is formed over a substrate. Stepped surfaces are formed in a contact region in which contact via structures are to be subsequently formed. An epitaxial semiconductor pedestal can be formed by a single epitaxial deposition process that is performed after formation of the stepped surfaces and prior to formation of memory openings, or a combination of a first epitaxial deposition process performed prior to formation of memory openings and a second epitaxial deposition process performed after formation of the memory openings. The epitaxial semiconductor pedestal can have a top surface that is located above a topmost surface of the alternating stack. The spacer material layers are formed as, or can be replaced with, electrically conductive layers. Backside contact via structures can be subsequently formed.

主权项

1. A method of fabricating a memory device, comprising:
forming an alternating stack of insulator layers and spacer material layers over a single crystalline semiconductor surface of a substrate; forming stepped surfaces by patterning the alternating stack, wherein the single crystalline semiconductor surface is exposed in a region from which all layers of the alternating stack are removed; after forming the stepped surfaces, forming an epitaxial semiconductor pedestal and a dielectric material portion over a semiconductor surface of the semiconductor substrate and over the stepped surfaces, respectively, wherein the epitaxial semiconductor pedestal is in epitaxial alignment with the single crystalline semiconductor surface of the substrate; forming an array of memory stack structures through a remaining portion of the alternating stack; forming at least one semiconductor device on the epitaxial semiconductor pedestal; forming a planarization stopping layer over the alternating stack; patterning the planarization stopping layer prior to forming the stepped surfaces; depositing a dielectric material over the patterned planarization stopping layer, the stepped surfaces and the epitaxial semiconductor pedestal; and planarizing the dielectric material using the epitaxial semiconductor pedestal and the planarization stopping layer a stopping structures to form the dielectric material portion, wherein the epitaxial semiconductor pedestal is formed by a selective epitaxy process prior to formation of the dielectric material portion.