| 发明名称 |
Memory array and coupled TCAM architecture for improved access time during search operation |
| 摘要 |
A memory device includes a first ternary content addressable memory (TCAM), a second TCAM, a memory array coupled to the first and second TCAMs, a first priority logic coupled between the first TCAM and the memory array, a second priority logic coupled between the second TCAM and the memory array, and a look-ahead signal generated by the first priority logic and provided to the second priority logic. Match lines from the first and second TCAMs are coupled to respective word lines in the memory array. |
| 申请公布号 |
US9543015(B1) |
申请公布日期 |
2017.01.10 |
| 申请号 |
US201514860945 |
申请日期 |
2015.09.22 |
| 申请人 |
NXP USA, Inc. |
发明人 |
Roy Anirban |
| 分类号 |
G11C15/00;G11C7/00;G11C15/04 |
主分类号 |
G11C15/00 |
| 代理机构 |
|
代理人 |
|
| 主权项 |
1. A memory device comprising:
a first ternary content addressable memory (TCAM); a second TCAM; a memory array coupled to the first and second TCAMs; a first priority logic coupled between the first TCAM and the memory array; a second priority logic coupled between the second TCAM and the memory array; and a look-ahead signal generated by the first priority logic and provided to the second priority logic, wherein match lines from the first and second TCAMs are coupled to respective word lines in the memory array, and
wherein a pitch of match lines for the first and second TCAMs is approximately twice a pitch of word lines in the memory array. |
| 地址 |
Austin TX US |
