发明名称 Method and structure of MEMS WLCSP fabrication
摘要 A method for fabricating a MEMS-IC device structure can include receiving a CMOS substrate comprising a plurality of CMOS circuits and a surface portion. A MEMS substrate having at least one MEMS device can be received and coupled to the CMOS substrate. The MEMS substrate and the surface portion of the CMOS substrate can be encapsulated with a molding material, which forms a top surface. A first plurality of vias can be created in the molding material from the top surface to the surface portion of the CMOS substrate. A conductive material can be disposed within the first plurality of vias such that the conductive material is electrically coupled to a portion of the CMOS substrate. A plurality of interconnects can be formed from the conductive material to the top surface of the molding material and a plurality of solder balls can be formed upon these interconnects.
申请公布号 US9540232(B2) 申请公布日期 2017.01.10
申请号 US201414507177 申请日期 2014.10.06
申请人 mCube Inc. 发明人 Lee Chien Chen
分类号 B81C1/00 主分类号 B81C1/00
代理机构 Kilpatrick Townsend and Stockton LLP 代理人 Kilpatrick Townsend and Stockton LLP
主权项 1. A method for fabricating a MEMS (Micro Electro Mechanical System) IC (Integrated Circuit) device comprising: receiving a CMOS substrate comprising a plurality of CMOS circuits and a first plurality of interconnection locations, wherein the first plurality of interconnection locations comprises a first set of locations and a second set of locations, wherein the CMOS substrate includes a surface portion, and wherein the first set of locations is disposed upon the surface portion; receiving a MEMS substrate comprising at least one MEMS device and a second plurality of interconnection locations comprising a third set of locations; coupling the MEMS substrate to the CMOS substrate such that the second set of locations are coupled to the third set of locations; encapsulating the MEMS substrate and the surface portion of the CMOS substrate with a molding material, wherein the molding material forms a top surface; creating a first plurality of vias in the molding material from the top surface to the surface portion of the CMOS substrate, thereby exposing at least a portion of the first set of locations; disposing a conductive material in the first plurality of vias such that the conductive material is electrically coupled to the first set of locations; and forming a plurality of interconnects from the conductive material to the top surface of the molding material.
地址 San Jose CA US