发明名称 |
Surgical generator and related method for mitigating overcurrent conditions |
摘要 |
A surgical generator and related method for mitigating overcurrent conditions are provided. The surgical generator includes a power supply, a radio frequency output stage, an overcurrent detection circuit in operative communication with an interrupt circuit, and a processor. The power supply generates a power signal and supplies the power signal to the radio frequency output stage. The radio frequency output stage generates a radio frequency signal from the power signal. The overcurrent detection circuit detects an overcurrent of the power signal and/or an overcurrent of the radio frequency signal. The interrupt circuit provides an interrupt signal in response to a detected overcurrent. The processor receives the interrupt signal and supplies a pulse-width modulation signal to the power supply and incrementally decreases the duty cycle of the pulse-width modulation signal in response to the interrupt signal. The radio frequency output stage may be disabled in response to the detected overcurrent. |
申请公布号 |
US9543750(B2) |
申请公布日期 |
2017.01.10 |
申请号 |
US201514806247 |
申请日期 |
2015.07.22 |
申请人 |
Covidien LP |
发明人 |
Smith Robert B.;Rupp Steven C. |
分类号 |
A61B18/12;H02H3/08;A61B18/14;A61B18/00 |
主分类号 |
A61B18/12 |
代理机构 |
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代理人 |
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主权项 |
1. A surgical generator, comprising:
a power supply configured to generate a power signal; a radio frequency output stage electrically coupled to the power supply and configured to receive the power signal and generate a radio frequency signal from the power signal; an overcurrent detection circuit configured to detect one of an overcurrent of the power signal and an overcurrent of the radio frequency signal; an interrupt circuit coupled to the overcurrent detection circuit in operative communication therewith, wherein the interrupt circuit provides an interrupt signal in response to a detected overcurrent; and a processor configured to supply a pulse-width modulation signal to the power supply in operative communication with the interrupt circuit to receive the interrupt signal therefrom, wherein the processor incrementally decreases a duty cycle of the pulse-width modulation signal in response to the interrupt signal while the duty cycle of the pulse-width modulation signal is above a predetermined low duty cycle. |
地址 |
Mansfield MA US |