| 发明名称 |
Height Reduction in Memory Periphery |
| 摘要 |
A NAND flash memory has word lines in a memory array area and contact pads and lead lines in a word line hookup area, each of the word lines connected to a corresponding contact pad by a lead line. The word lines in the memory array area have a first height and low-profile areas of lead lines in the word line hookup area have a second height that is less than the first height. |
| 申请公布号 |
US2017005105(A1) |
申请公布日期 |
2017.01.05 |
| 申请号 |
US201514755904 |
申请日期 |
2015.06.30 |
| 申请人 |
SanDisk Technologies, Inc. |
发明人 |
Hara Hideki |
| 分类号 |
H01L27/115 |
主分类号 |
H01L27/115 |
| 代理机构 |
|
代理人 |
|
| 主权项 |
1. A NAND flash memory comprising:
a plurality of word lines in a NAND memory array area; a plurality of contact pads and lead lines in a word line hookup area, each of the plurality of word lines electrically connected to a corresponding contact pad by a corresponding lead line; and wherein the plurality of word lines in the memory array area have a first height and low-profile areas of one or more lead lines in the word line hookup area have a second height that is less than the first height. |
| 地址 |
Plano TX US |
