发明名称 |
CHIP MOUNTING STRUCTURE |
摘要 |
Highly reliable chip mounting is accomplished by using a substrate having such a shape that a stress exerted on a flip-chip-connected chip can be reduced, so that the stress exerted on the chip is reduced and separation of an interlayer insulating layer having a low dielectric constant (low-k) is minimized. Specifically, in a chip mounting structure, a chip including an interlayer insulating layer having a low dielectric constant (low-k) is flip-chip connected to a substrate via bumps is shown. In the chip mounting structure, the substrate has such a shape that a mechanical stress exerted on the interlayer insulating layer at corner portions of the chip due to a thermal stress is reduced, the thermal stress occurring due to a difference in coefficient of thermal expansion between the chip and the substrate. |
申请公布号 |
US2017005053(A1) |
申请公布日期 |
2017.01.05 |
申请号 |
US201615255588 |
申请日期 |
2016.09.02 |
申请人 |
International Business Machines Corporation |
发明人 |
HORIBE Akihiro;MATSUMOTO Keiji;OKAMOTO Keishi;TORIYAMA Kazushige |
分类号 |
H01L23/00 |
主分类号 |
H01L23/00 |
代理机构 |
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代理人 |
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主权项 |
1. A chip mounting structure, comprising:
a chip including an interlayer insulating layer having a low dielectric constant; and a substrate to which the chip is flip-chip connected via a bump, wherein the substrate has such a shape that a mechanical stress exerted on the interlayer insulating layer at a corner portion of the chip due to a thermal stress is reduced, the thermal stress occurring due to a difference in coefficient of thermal expansion between the chip and the substrate. |
地址 |
Armonk NY US |