发明名称 TRANSACTIONAL STORAGE ACCESSES SUPPORTING DIFFERING PRIORITY LEVELS
摘要 In at least some embodiments, a cache memory of a data processing system receives a transactional memory access request including a target address and a priority of the requesting memory transaction. In response, transactional memory logic detects a conflict for the target address with a transaction footprint of an existing memory transaction and accesses a priority of the existing memory transaction. In response to detecting the conflict, the transactional memory logic resolves the conflict by causing the cache memory to fail the requesting or existing memory transaction based at least in part on their relative priorities. Resolving the conflict includes at least causing the cache memory to fail the existing memory transaction when the requesting memory transaction has a higher priority than the existing memory transaction, the transactional memory access request is a transactional load request, and the target address is within a store footprint of the existing memory transaction.
申请公布号 US2017004085(A1) 申请公布日期 2017.01.05
申请号 US201514790158 申请日期 2015.07.02
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 GUTHRIE GUY L.;LE HUNG Q.;STARKE WILLIAM J.;WILLIAMS DEREK E.
分类号 G06F12/08 主分类号 G06F12/08
代理机构 代理人
主权项
地址 ARMONK NY US