SELF-TEST CIRCUIT IN INTEGRATED CIRCUIT, AND DATA PROCESSING CIRCUIT

摘要

A self-test circuit is driven by a multiphase clock signal which includes N number of clock signals in same cycle having phases from first to N-th phases each phase-shifted by 1/N of the cycle. The self-test circuit includes a data selecting circuit, a serialization circuit, and a logical test circuit. The data selecting circuit switches input data that are input as M-bit wide parallel data to the self-test circuit, between normal data and test data for logical test. The serialization circuit performs serial conversion of the input data in N-parallel manner and outputs bits in N-parallel manner, as a single serial output signal at timing corresponding to each phase. In synchronization with timing corresponding to each phase, the logical test circuit imports the serial output signal as N-parallel bit strings each having length equal to M/N number of bits and performs a bit logical test for M number of bits.

主权项

1. A self-test circuit in an integrated circuit driven by a multiphase clock signal which includes N number of clock signals in same cycle having phases from a first phase to an N-th phase that are each phase-shifted by 1/N of the cycle, the self-test circuit comprising:
a data selecting circuit configured to switch input data between normal data and test data for logical test, the input data being input as N-bit wide parallel data to the self-test circuit; a serialization circuit configured to perform serial conversion of the input data in N-parallel manner and outputs bits in N-parallel manner, as a single serial output signal at timing corresponding to each phase from the first phase to the N-th phase; and a logical test circuit configured to, in synchronization with timing corresponding to each phase from the first phase to the N-th phase, import the serial output signal as N-parallel bit strings each having length equal to M/N number of bits and perform a bit logical test for N number of bits.