| 主权项 |
1. A semiconductor device comprising:
a semiconductor substrate having a first main surface and a second main surface on an opposite side of the first main surface; a first semiconductor layer of a first conductivity type formed in the semiconductor substrate; a second semiconductor layer of a second conductivity type different from the first conductivity type formed in a part of the semiconductor substrate positioned on a side close to the second main surface relative to the first semiconductor layer; a first trench portion which reaches a middle of the first semiconductor layer from the first main surface and extends in a first direction when seen in a plan view; a second trench portion which reaches the middle of the first semiconductor layer from the first main surface, is arranged to be spaced apart from the first trench portion, and extends in the first direction when seen in a plan view; a third trench portion which reaches the middle of the first semiconductor layer from the first main surface, is arranged on an opposite side of the first trench portion with the second trench portion interposed therebetween, and extends in the first direction when seen in a plan view; a fourth trench portion which reaches the middle of the first semiconductor layer from the first main surface, is arranged on an opposite side of the second trench portion with the third trench portion interposed therebetween, and extends in the first direction when seen in a plan view; a first insulating film formed on an inner wall of the first trench portion; a second insulating film formed on an inner wall of the second trench portion; a third insulating film formed on an inner wall of the third trench portion; a fourth insulating film formed on an inner wall of the fourth trench portion; a first trench electrode which is formed on the first insulating film so as to fill the first trench portion; a second trench electrode which is formed on the second insulating film so as to fill the second trench portion; a third trench electrode which is formed on the third insulating film so as to fill the third trench portion; a fourth trench electrode which is formed on the fourth insulating film so as to fill the fourth trench portion; a first semiconductor region of the second conductivity type which is formed in a part of the first semiconductor layer positioned between the first trench portion and the second trench portion and is in contact with the first insulating film and the second insulating film; a second semiconductor region of the second conductivity type which is formed in a part of the first semiconductor layer positioned between the third trench portion and the fourth trench portion and is in contact with the third insulating film and the fourth insulating film; a third semiconductor region of the first conductivity type which is formed in a part of the first semiconductor layer positioned between the first trench portion and the second trench portion and is in contact with the first semiconductor region and the first insulating film; a fourth semiconductor region of the first conductivity type which is formed in a part of the first semiconductor layer positioned between the first trench portion and the second trench portion and is in contact with the first semiconductor region and the second insulating film; a fifth semiconductor region of the second conductivity type which is formed in a part of the first semiconductor layer positioned on an opposite side of the second trench portion with the first trench portion interposed therebetween; a sixth semiconductor region of the second conductivity type which is formed in a part of the first semiconductor layer positioned between the second trench portion and the third trench portion; a seventh semiconductor region of the second conductivity type which is formed in a part of the first semiconductor layer positioned on an opposite side of the third trench portion with the fourth trench portion interposed therebewteen; a plurality of eighth semiconductor regions of the second conductivity type each of which is formed in a part of the first semiconductor layer positioned between the first trench portion and the second trench portion and is in contact with the first semiconductor region; a ninth semiconductor region of the second conductivity type which is formed in a part of the first semiconductor layer positioned between the third trench portion and the fourth trench portion and is in contact with the second semiconductor region; an emitter electrode which is electrically connected to the third semiconductor region, the fourth semiconductor region, the plurality of eighth semiconductor regions, the ninth semiconductor region, the third trench electrode, and the fourth trench electrode; a collector electrode which is electrically connected to the second semiconductor layer; and a gate electrode which is electrically connected to the first trench electrode and the second trench electrode, wherein an end portion of the fifth semiconductor region on the side close to the second main surface is arranged close to the second main surface in a second direction, which is perpendicular to the first main surface, relative to an end portion of the first trench portion on the side close to the second main surface, an end portion of the sixth semiconductor region on the side close to the second main surface is arranged close to the second main surface in the second direction relative to any of an end portion of the second trench portion on the side close to the second main surface and an end portion of the third trench portion on the side close to the second main surface, an end portion of the seventh semiconductor region on the side close to the second main surface is arranged close to the second main surface in the second direction relative to an end portion of the fourth trench portion on the side close to the second main surface, an impurity concentration of the second conductivity type of each of the plurality of eighth semiconductor regions is higher than an impurity concentration of the second conductivity type of the first semiconductor region, an impurity concentration of the second conductivity type of the ninth semiconductor region is higher than an impurity concentration of the second conductivity type of the second semiconductor region, the plurality of eighth semiconductor regions are arranged to be spaced apart from each other along the first direction when seen in a plan view, and the ninth semiconductor region is continuously formed along the first direction. |
