发明名称 |
SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME |
摘要 |
A semiconductor device includes a first semiconductor layer, a second semiconductor layer formed over the first semiconductor layer, a third semiconductor layer formed over the second semiconductor layer, a gate electrode formed over the third semiconductor layer, and a gate insulating film formed between the third semiconductor layer and the gate electrode. The second semiconductor layer includes an Alyα1-yN layer (α includes Ga or In, and 0≦y<1), and the third semiconductor layer includes an Alzα1-zN layer (0≦z<1). y of the Alyα1-yN layer forming the second semiconductor layer increases from the third semiconductor layer to the first semiconductor layer at least in a region under the gate electrode. There is a relationship “z>y” at an interface between the second nitride semiconductor layer and the third nitride semiconductor layer. |
申请公布号 |
US2017005189(A1) |
申请公布日期 |
2017.01.05 |
申请号 |
US201615265328 |
申请日期 |
2016.09.14 |
申请人 |
Renesas Electronics Corporation |
发明人 |
OKAMOTO Yasuhiro;NAKAYAMA Tatsuo;INOUE Takashi;MIYAMOTO Hironobu |
分类号 |
H01L29/778;H01L29/205;H01L21/02;H01L29/417;H01L29/66;H01L29/20;H01L29/423 |
主分类号 |
H01L29/778 |
代理机构 |
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代理人 |
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主权项 |
1. A semiconductor device, comprising:
a first semiconductor layer; a second semiconductor layer formed over the first semiconductor layer; a third semiconductor layer formed over the second semiconductor layer; a gate electrode formed over the third semiconductor layer; and a gate insulating film formed between the third semiconductor layer and the gate electrode, wherein the second semiconductor layer comprises an Alyα1-yN layer (a comprises Ga or In, and 0≦y<1), and the third semiconductor layer comprises an Alzα1-zN layer (0≦z<1), wherein y of the Alyα1-yN layer forming the second semiconductor layer increases from the third semiconductor layer to the first semiconductor layer at least in a region under the gate electrode, and wherein there is a relationship “z>y” at an interface between the second nitride semiconductor layer and the third nitride semiconductor layer. |
地址 |
Tokyo JP |