发明名称 THREAD AND DATA ASSIGNMENT IN MULTI-CORE PROCESSORS
摘要 Technologies are generally described for methods and systems to assign threads in a multi-core processor. In an example, a method to assign threads in a multi-core processor may include determining data relating to memory controllers fetching data in response to cache misses experienced by a first core and a second core. Threads may be assigned to cores based on the number of cache misses processed by respective memory controllers. Methods may further include determining that a thread is latency-bound or bandwidth-bound. Threads may be assigned to cores based on the determination of the thread as latency-bound or bandwidth-bound. In response to the assignment of the threads to the cores, data for the thread may be stored in the assigned cores.
申请公布号 EP3111333(A1) 申请公布日期 2017.01.04
申请号 EP20140884199 申请日期 2014.02.27
申请人 Empire Technology Development LLC 发明人 SOLIHIN, Yan
分类号 G06F13/14 主分类号 G06F13/14
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