发明名称 Executing a hardware simulation and verification solution
摘要 One embodiment of the present invention provides systems and techniques to execute a hardware simulation and verification solution on a multiprocessor system. The hardware simulation and verification solution can be partitioned into different modules which can include a simulation kernel to simulate changes in signal values, a value change dump module to store the changes in the signal values on a computer-readable storage medium, a functional coverage module to check functionality, a toggle coverage module to check signal toggling, an assertion engine to check complex behaviors, and a testbench module to generate test scenarios. Embodiments of the present invention can execute different modules on different processors, thereby improving performance.
申请公布号 US9536027(B2) 申请公布日期 2017.01.03
申请号 US201414273152 申请日期 2014.05.08
申请人 SYNOPSYS, INC. 发明人 Jain Manish;Chowdhury Subha S.;Seshadri Sridhar
分类号 G06F17/50 主分类号 G06F17/50
代理机构 Park, Vaughan, Fleming & Dowler LLP 代理人 Park, Vaughan, Fleming & Dowler LLP ;Sahasrabuddhe Laxman
主权项 1. A method for executing a hardware simulation and verification solution on multiple processors, wherein the hardware simulation and verification solution includes a simulation kernel to simulate changes in signal values for a design under test (DUT) and a toggle coverage module to check signal toggling for the DUT, the method comprising: compiling source files which describe the DUT to obtain the simulation kernel, wherein the simulation kernel exposes a callback interface which is used to install callback functions which are invoked when specific events occur, wherein compiling the source files includes installing a first callback function which is invoked whenever the simulation kernel generates the value change data, and wherein the first callback function includes: (1) instructions for collecting the value change data, and (2) instructions for storing the value change data so that a second processor can access the value change data; executing the simulation kernel on a first processor, thereby causing the first processor to: generate value change data which represents changes in a set of signal values which are used in a toggle coverage model for the DUT; andstore the value change data so that the second processor, which is different from the first processor, is able to access the value change data; and executing the toggle coverage module on the second processor, thereby causing the second processor to: determine a toggle coverage metric using the toggle coverage model and the value change data; andreport the toggle coverage metric.
地址 Mountain View CA US