发明名称 Method and apparatus for continued retirement during commit of a speculative region of code
摘要 A processor, system, and method are described for continued retirement of operations during a commit of a speculative region of program code. For example, one embodiment of a method comprises the operations of identifying a plurality of transactional memory regions in program code, including a first transactional memory region; and retiring one or more of a plurality of operations which follow the first transactional memory region even when a commit operation associated with the first transactional memory region is waiting to complete.
申请公布号 US9535744(B2) 申请公布日期 2017.01.03
申请号 US201313931860 申请日期 2013.06.29
申请人 INTEL CORPORATION 发明人 Rajwar Ravi;Merten Matthew C.;Wang Christine E.;Kadgi Vijaykumar B.;Parthasarathy Rajesh S.
分类号 G06F9/46;G06F9/38;G06F9/52 主分类号 G06F9/46
代理机构 Nicholson De Vos Webster & Elliott LLP 代理人 Nicholson De Vos Webster & Elliott LLP
主权项 1. A method implemented in a processor comprising: identifying a plurality of transactional memory regions in program code, including a first transactional memory region; and retiring one or more of plurality of operations which follow the first transactional memory region even when a commit operation associated with the first transactional memory region is waiting to complete, wherein the commit operation associated with the first transactional memory region includes at least one speculative execution, wherein the one or more of plurality of operations that follow the first transactional memory region are treated as part of the first transactional memory region so that states of architectural registers of the processor from execution of the first transactional memory region and the one or more of the plurality of operations are preserved.
地址 Santa Clara CA US
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