发明名称 Arbitrating memory accesses via a shared memory fabric
摘要 In an embodiment, a shared memory fabric is configured to receive memory requests from multiple agents, where at least some of the requests have an associated deadline value to indicate a maximum latency prior to completion of the memory request. Responsive to the requests, the fabric is to arbitrate between the requests based at least in part on the deadline values. Other embodiments are described and claimed.
申请公布号 US9535860(B2) 申请公布日期 2017.01.03
申请号 US201313743795 申请日期 2013.01.17
申请人 Intel Corporation 发明人 Cutter Daniel F.;Fanning Blaise;Nagarajan Ramadass;Niell Jose S.;Bernstein Debra;Limaye Deepak;Schoinas Ioannis T.;Iyer Ravishankar
分类号 G06F12/00;G06F13/16 主分类号 G06F12/00
代理机构 Trop, Pruner & Hu, P.C. 代理人 Trop, Pruner & Hu, P.C.
主权项 1. An apparatus comprising: a fabric coupled between a plurality of intellectual property (IP) blocks of a semiconductor device and a memory controller, the fabric configured to provide global timing information to at least some of the plurality of IP blocks and receive a plurality of memory requests from the plurality of IP blocks, wherein the fabric is configured to receive a memory request of the plurality of memory requests from a first IP block of the plurality of IP blocks, the memory request having a plurality of fields including a deadline field to provide a deadline value based at least in part on the global timing information, the deadline value communicated by the first IP block to indicate a maximum latency before completion of the memory request, the maximum latency determined by the first IP block and wherein the fabric is configured to arbitrate between the plurality of memory requests based at least in part on the deadline value included in the deadline field of the memory request.
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