Technologies for application validation in persistent memory systems

摘要

Technologies for software testing include a computing device having persistent memory that includes a platform simulator and an application or other code module to be tested. The computing device generates a checkpoint for the application at a test location using the platform simulator. The computing device executes the application from the test location to an end location and traces all writes to persistent memory using the platform simulator. The computing device generates permutations of persistent memory writes that are allowed by the hardware specification of the computing device simulated by the platform simulator. The computing device replays each permutation from the checkpoint, simulates a power failure, and then invokes a user-defined test function using the platform simulator. The computing device may test different permutations of memory writes until the application's use of persistent memory is validated. Other embodiments are described and claimed.

主权项

1. A computing device for software testing, the computing device comprising:
a capture module to: (i) execute a code module using a platform simulator of the computing device from a test location in the code module to a second location in the code module and (ii) trace a persistent memory state of a simulated computing device simulated by the platform simulator during execution of the code module to generate trace data indicative of the persistent memory state including a plurality of persistent memory writes executed by the code module; and a replay module to (i) generate a permutation of the plurality of persistent memory writes executed by the code module based on the trace data, wherein the permutation of the plurality of persistent memory writes has an ordering that is allowed by a hardware specification of the simulated computing device, (ii) replay the permutation of the plurality of persistent memory writes to generate an adjusted persistent memory state, (iii) simulate a power failure in response to a replay of the permutation of persistent memory writes, wherein to simulate the power failure comprises to stop the replay of the permutation when the permutation is partially completed, and (iv) invoke a test function associated with the code module using the platform simulator with the adjusted persistent memory state in response to simulation of the power failure.