发明名称 |
Memory access request for a memory protocol |
摘要 |
A computer-implemented method includes identifying two or more memory locations and referencing, by a memory access request, the two or more memory locations. The memory access request is a single action pursuant to a memory protocol. The computer-implemented method further includes sending the memory access request from one or more processors to a node and fetching, by the node, data content from each of the two or more memory locations. The computer-implemented method further includes packaging, by the node, the data content from each of the two or more memory locations into a memory package, and returning the memory package from the node to the one or more processors. A corresponding computer program product and computer system are also disclosed. |
申请公布号 |
US9535608(B1) |
申请公布日期 |
2017.01.03 |
申请号 |
US201615160074 |
申请日期 |
2016.05.20 |
申请人 |
International Business Machines Corporation |
发明人 |
Busaba Fadi Y.;Cain, III Harold W.;Gschwind Michael Karl;Salapura Valentina;Slegel Timothy J. |
分类号 |
G06F9/46;G06F3/06 |
主分类号 |
G06F9/46 |
代理机构 |
|
代理人 |
Fisher-Stawinski Steven L. |
主权项 |
1. A computer-implemented method comprising:
identifying two or more memory locations, wherein said two or more memory locations are not contiguous; referencing, by a memory access request, said two or more memory locations; sending said memory access request from one or more processors to a node, said memory access request comprising a single action pursuant to a memory protocol; fetching, by said node, data content from each of said two or more memory locations, wherein said node is of at least one type selected from the group consisting of: one or more additional processors, a memory controller, and a cache controller; packaging, by said node, said data content from each of said two or more memory locations into a memory package; returning said memory package from said node to said one or more processors; initiating a transaction in a transactional memory environment, wherein said two or more memory locations are used in said transaction; and wherein referencing, by the memory access request, said two or more memory locations comprises:
identifying numerical addresses for said two or more memory locations;identifying, in said numerical addresses, shared high order bits; andcompressing said two or more memory locations based on said shared high order bits. |
地址 |
Armonk NY US |