发明名称 |
Neural Network Processor |
摘要 |
A circuit for performing neural network computations for a neural network comprising a plurality of neural network layers, the circuit comprising: a matrix computation unit configured to, for each of the plurality of neural network layers: receive a plurality of weight inputs and a plurality of activation inputs for the neural network layer, and generate a plurality of accumulated values based on the plurality of weight inputs and the plurality of activation inputs; and a vector computation unit communicatively coupled to the matrix computation unit and configured to, for each of the plurality of neural network layers: apply an activation function to each accumulated value generated by the matrix computation unit to generate a plurality of activated values for the neural network layer. |
申请公布号 |
US2016342891(A1) |
申请公布日期 |
2016.11.24 |
申请号 |
US201514844524 |
申请日期 |
2015.09.03 |
申请人 |
Google Inc. |
发明人 |
Ross Jonathan;Jouppi Norman Paul;Phelps Andrew Everett;Young Reginald Clifford;Norrie Thomas;Thorson Gregory Michael;Luu Dan |
分类号 |
G06N3/08;G06N99/00 |
主分类号 |
G06N3/08 |
代理机构 |
|
代理人 |
|
主权项 |
1. A circuit for performing neural network computations for a neural network comprising a plurality of neural network layers, the circuit comprising:
a matrix computation unit configured to, for each of the plurality of neural network layers:
receive a plurality of weight inputs and a plurality of activation inputs for the neural network layer,generate a plurality of accumulated values based on the plurality of weight inputs and the plurality of activation inputs; and a vector computation unit communicatively coupled to the matrix computation unit and configured to, for each of the plurality of neural network layers:
apply an activation function to each accumulated value generated by the matrix computation unit to generate a plurality of activated values for the neural network layer. |
地址 |
Mountain View CA US |