发明名称 Visualization Of Analysis Process Parameters For Layout-Based Checks
摘要 Techniques and mechanisms for marking the parameters of a circuit analysis process for visual identification are disclosed. The visually-identified parameters can then be employed with the results of the circuit analysis to debug the layout design.
申请公布号 US2016342728(A1) 申请公布日期 2016.11.24
申请号 US201514716775 申请日期 2015.05.19
申请人 Mentor Graphics Corporation 发明人 Gibson Patrick D.;Kharas Farhad T.;Chang I-Shan;Jackson, III MacDonald Hall
分类号 G06F17/50 主分类号 G06F17/50
代理机构 代理人
主权项 1. One or more computer readable media storing computer-executable instructions for causing a computer to perform any of the new and nonobvious methods and method acts described herein, both alone and in combinations and subcombinations with one another.
地址 Wilsonsville OR US