发明名称 |
SYSTEMS AND METHODS FOR ADDRESSING A CACHE WITH SPLIT-INDEXES |
摘要 |
Cache memory mapping techniques are presented. A cache may contain an index configuration register. The register may configure the locations of an upper index portion and a lower index portion of a memory address. The portions may be combined to create a combined index. The configurable split-index addressing structure may be used, among other applications, to reduce the rate of cache conflicts occurring between multiple processors decoding the video frame in parallel. |
申请公布号 |
US2016342521(A1) |
申请公布日期 |
2016.11.24 |
申请号 |
US201514716588 |
申请日期 |
2015.05.19 |
申请人 |
Linear Algebra Technologies Limited |
发明人 |
RICHMOND Richard |
分类号 |
G06F12/08 |
主分类号 |
G06F12/08 |
代理机构 |
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代理人 |
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主权项 |
1. A method for storing elements from a main memory into a cache comprising:
associating each of a plurality of cache lines from a cache memory with a different one of a plurality of indexes, wherein one of the plurality of indexes comprises a first combined index; defining a first set of bits from a first address associated with a first memory location from the main memory as a first index portion and a second set of bits from the first address as a second index portion; generating the first combined index by concatenating the first index portion and the second index portion; and mapping at least the first memory location to a first cache line from the plurality of cache lines based on the first combined index. |
地址 |
Dublin IE |