发明名称 半導体装置
摘要 PROBLEM TO BE SOLVED: To provide an art capable of preventing reduction of reliability caused by element isolation in a semiconductor device in which an element region in a semiconductor which is formed on an SOI substrate and composes the SOI substrate is surrounded by element isolation.SOLUTION: In a semiconductor device, by decreasing a trench width of an upper part of a deep trench 4 which composed trench isolation to be narrower than 1.2 μm, a cavity 7 produced when the inside of the deep trench 4 is filled with an insulation film 5 is prevented from being exposed on a top face of the insulation film 5. A decrease in voltage withstanding between element regions adjacent to each other, which is caused by a decrease in trench width of an upper part of the deep trench 4 is avoided by forming a LOCOS insulation film 6 linked to the insulation film 5 filled in the inside of the deep trench 4.
申请公布号 JP6030109(B2) 申请公布日期 2016.11.24
申请号 JP20140255787 申请日期 2014.12.18
申请人 ルネサスエレクトロニクス株式会社 发明人 川俣 達哉;舘上 敦;堀江 一也;城本 竜也;新田 哲也;清水 博紀
分类号 H01L21/76;H01L21/336;H01L29/786 主分类号 H01L21/76
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