发明名称 CONTROL SYSTEMS STATE VECTOR MANAGEMENT USING CO-PROCESSING AND MULTIPORT RAM
摘要 An integrated state vector management system for control systems includes a plurality of co-processors configured to generate and utilize state vector data. The integrated state vector management system further includes state vector module communicatively connected to each of the plurality of co-processors. The state vector module includes a state vector memory containing at least three memory buffers for storing three datasets of state vector data. The state vector module further includes a state vector memory control logic communicatively coupled to the state vector memory. The state vector control logic is configured to provide read and write control to the state vector memory. The state vector memory control logic includes at least a write pointer controller and a read pointer controller.
申请公布号 EP3096234(A1) 申请公布日期 2016.11.23
申请号 EP20160170936 申请日期 2016.05.23
申请人 GOODRICH CORPORATION 发明人 RENCS, ERIK V.
分类号 G06F15/76 主分类号 G06F15/76
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