发明名称 半導体装置
摘要 This semiconductor apparatus is provided with an internal wiring layer (23), a plurality of insulating layers (33, 34) laminated onto the internal wiring layer, and an electrode pad (25) arranged above the plurality of insulating layers such that at least a portion thereof faces at least a portion of the internal wiring layer, with the plurality of insulating layers therebetween. Of the plurality of insulating layers, the adjacent insulating layer (34) which is laminated onto the internal wiring layer has a Young's modulus lower than the Young's modulus of the other insulating layer (33). The breakdown strength of the adjacent insulating layer is greater than the breakdown strength of the other insulating layer.
申请公布号 JP6028704(B2) 申请公布日期 2016.11.16
申请号 JP20130212444 申请日期 2013.10.10
申请人 株式会社デンソー 发明人 鈴木 智久;成瀬 孝好;曽根 弘樹
分类号 H01L21/3205;H01L21/60;H01L21/768;H01L23/522 主分类号 H01L21/3205
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