| 摘要 |
PROBLEM TO BE SOLVED: To provide a CMOS SGT manufacturing method which is a gate last process, and forms an nMOS SGT and a pMOS SGT from one dummy pattern; and provide the consequent SGT structure.SOLUTION: A semiconductor device manufacturing method comprises: a process of forming first and second fin-shaped silicon layers on a substrate, forming a first insulation film around the first and second fin-shaped silicon layers, and forming first and second columnar silicon layer on upper parts of the first and second fin-shaped silicon layers; a process of implanting an impurity into an upper part of the first columnar silicon layer, the upper part of the first fin-shaped silicon layer and a lower part of the first columnar silicon layer to form an n-type diffusion layer; a process of implanting an impurity into an upper part of the second columnar silicon layer, the upper part of the second fin-shaped silicon layer and a lower part of the second columnar silicon layer to form a p-type diffusion layer; a process of forming a gate insulation film and first and second polysilicon gate electrodes; and a process of forming a silicide on an upper part of the diffusion layer at the upper parts of the first and second fin-shaped silicon layers. |
