发明名称 半導体装置およびレイアウト設計システム
摘要 In a semiconductor device including a seal ring area containing multiple seal rings are coupled to each other at equal intervals via bridge patterns, improper local relocation of bridge patterns may reduce the reliability of the semiconductor device. A semiconductor device has a first group containing a predetermined number of the bridge patterns spaced at a first interval and a second group containing a predetermined number of the bridge patterns spaced at the first interval, the second group being located at a second interval from the first group. The second interval is larger than the first interval.
申请公布号 JP6026322(B2) 申请公布日期 2016.11.16
申请号 JP20130049046 申请日期 2013.03.12
申请人 ルネサスエレクトロニクス株式会社 发明人 齋藤 琢巳;廣井 政幸
分类号 H01L21/3205;G06F17/50;H01L21/768;H01L21/82;H01L21/822;H01L23/522;H01L27/04 主分类号 H01L21/3205
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