发明名称 配線回路基板およびその製造方法
摘要 Read wiring traces and write wiring traces are formed on an insulating layer that is formed on a support substrate. Connection terminals that are electrically connectable to external circuits are formed at parts of the read wiring traces and write wiring traces on the insulating layer, respectively. Openings are formed in the support substrate so as to partially or entirely surround overlap regions that overlap with the connection terminals and have the same plane shape as the connection terminals. Parts of the insulating layer are exposed in the openings.
申请公布号 JP6025384(B2) 申请公布日期 2016.11.16
申请号 JP20120103931 申请日期 2012.04.27
申请人 日東電工株式会社 发明人 杉本 悠;白藤 陽平
分类号 G11B5/60;G11B21/21;H05K1/02;H05K1/05 主分类号 G11B5/60
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