发明名称 Encoding/decoding apparatus
摘要 An encoding/decoding apparatus comprises a central processing unit and an encryption/decryption accelerator coupled to the central processing unit The accelerator comprises an input for input data to be encrypted/decrypted, an arithmetic logic unit coupled to said input for performing selectable operations on data obtained from said input data and an output for encrypted/decrypted data coupled to said arithmetic logic unit.
申请公布号 EP2015505(A3) 申请公布日期 2016.11.16
申请号 EP20080012447 申请日期 2008.07.10
申请人 STMICROELECTRONICS SRL;STMICROELECTRONICS, INC. 发明人 BERTONI, GUIDO MARCO;OWEN, JEFFERSON EUGENE
分类号 H04L9/06;G09C1/00 主分类号 H04L9/06
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