| 发明名称 |
METHOD OF FORMING AN INTEGRATED CIRCUIT AND RELATED INTEGRATED CIRCUIT |
| 摘要 |
A method (100) of forming an integrated circuit is disclosed. The method comprises: (i) forming at least a pair of optoelectronic devices from at least a first wafer material arranged on a semiconductor substrate, the first wafer material different to silicon; (ii) etching the first wafer material to form a first recess to be filled with a second material; (iii) processing (104) the second material to form a waveguide for coupling the pair of optoelectronic devices to define an optical interconnect; and (iv) bonding (106) at least one partially processed CMOS device layer having at least one transistor to the second semiconductor substrate to form the integrated circuit, the partially processed CMOS device layer arranged adjacent to the optical interconnect. An integrated circuit is also disclosed. |
| 申请公布号 |
US2016327737(A1) |
申请公布日期 |
2016.11.10 |
| 申请号 |
US201515111418 |
申请日期 |
2015.01.14 |
| 申请人 |
MASSACHUSETTS INSTITUTE OF TECHNOLOGY (MIT) ;NATIONAL UNIVERSITY OF SINGAPORE ;NANYANG TECHNOLOGICAL UNIVERSITY |
发明人 |
Zhang Wenjia;Wang Bing;Zhang Li;Zhu Zhaomin;Michel Jurgen;Chua Soo-Jin;Peh Li-Shiuan;Chiah Siau Ben;Lee Eng Kian Kenneth |
| 分类号 |
G02B6/12;H01L33/12;H01L33/32;G02B6/42;H01L31/0392;H01L31/0304;H01L31/153;H01L33/06;H01L31/0352 |
主分类号 |
G02B6/12 |
| 代理机构 |
|
代理人 |
|
| 主权项 |
1. A method of forming an integrated circuit, comprising:
(i) forming at least a pair of optoelectronic devices from at least a first wafer material arranged on a semiconductor substrate, the first wafer material different to silicon; (ii) etching the first wafer material to form a first recess to be filled with a second material; (iii) processing the second material to form a waveguide for coupling the pair of optoelectronic devices to define an optical interconnect; and (iv) bonding at least one partially processed CMOS device layer having at least one transistor to the semiconductor substrate to form the integrated circuit, the partially processed CMOS device layer arranged adjacent to the optical interconnect. |
| 地址 |
Cambridge MA US |
