发明名称 UNCERTAINTY AWARE INTERCONNECT DESIGN TO IMPROVE CIRCUIT PERFORMANCE AND/OR YIELD
摘要 Methods and an apparatus related to generating parameters and guidelines used in the manufacture of semiconductor IC devices are described. A method includes measuring a first oscillating signal produced by a first ring oscillator that includes a first interconnect provided in a first interconnect layer of an IC, selecting a first mode of operation for a second ring oscillator circuit that includes a second interconnect disposed in alignment with the first interconnect, selecting a second mode of operation for the second ring oscillator circuit, and determining one or more characteristics of the first interconnect based on a difference in frequency of the first oscillating signal produced when the second ring oscillator circuit is operated in the first mode and frequency of the first oscillating signal when the second ring oscillator circuit is operated in the second mode.
申请公布号 US2016329882(A1) 申请公布日期 2016.11.10
申请号 US201514707859 申请日期 2015.05.08
申请人 QUALCOMM Incorporated 发明人 Liu Chunchen;Law Oscar Ming Kin;Lu Ju-Yi;Chen Po-Hung;Duan Zhengyu
分类号 H03K3/03;H03K3/012 主分类号 H03K3/03
代理机构 代理人
主权项 1. An apparatus, comprising: a first ring oscillator circuit comprising a first delay stage that includes inverting logic elements coupled by a first interconnect of a first interconnect layer in an integrated circuit (IC); a second ring oscillator circuit comprising a second delay stage that includes inverting logic elements coupled by a second interconnect in the IC, wherein the second interconnect is disposed in proximate alignment with the first interconnect; and a processing circuit configured to: enable the first ring oscillator circuit, wherein the first ring oscillator circuit produces a first oscillating signal when enabled where the first oscillating signal has a frequency indicative of one or more characteristics of the first interconnect, andmonitor frequency of the first oscillating signal while operating the second ring oscillator circuit in a first mode of operation;monitor frequency of the first oscillating signal while operating the second ring oscillator circuit in a second mode of operation; anddetermine one or more characteristics of the first interconnect based on a difference in frequency of the first oscillating signal when the second ring oscillator circuit is operated in the first mode of operation and frequency of the first oscillating signal when the second ring oscillator circuit is operated in the second mode of operation, wherein a current provided in the second interconnect modifies the one or more characteristics of the first interconnect.
地址 San Diego CA US