| 摘要 |
A cache controller, e.g. memory management unit (MMU) 8, is coupled to a plurality of caches, e.g. micro transition lookaside buffers (uTLBs) 48. The coupling is implemented by two separate networks: unicast network 30 and multicast network 32. Unicast network 30 is an AXI switch network. It has a plurality of communication paths between controller 8 and any targeted cache 48. It is used for cache refill requests/responses, e.g. page table entries. Multicast network 32 asynchronously transmits cache invalidation requests 34 and responses 36 for coherency or synchronisation and simultaneously addresses selected caches or broadcasts to all uTLBs 48. In distributed caches systems, providing a separate multicast network avoids the complexity of adding multicast modes to unicast networks thus improving scalability. Moreover it avoids delaying of unicast communications because there is no blocking of available routes in the switch network by multicast communications. Applications are in graphics processing units (GPUs). |
