| 摘要 |
The present invention relates to a digital interpolator, comprising an input (12) to receive an input signal at a first clock frequency (f1) and comprising an output (18) to provide an interpolated signal at a second clock frequency (f2) larger than the first clock frequency (f1). The interpolator comprises a differentiator (20) connected to the input (12), an interpolator stage (30) connected to a differentiator output (25), and an integrator (40) connected to the output (18) and connected to an output (39) of the interpolator stage (30). |
