| 摘要 |
The utility model provides an analog switch circuit (1), comprising an NMOS transistor (M1) which is connected with a drain electrode of an input terminal (IN), a source electrode and a drain electrode which are respectively connected with grid electrodes of a power node (VDD) and the NMOS transistor (M1), and a PMOS transistor (SW1) which is connected with a grid electrode of a control terminal (CTRL), a PMOS transistor (QP) which is provide with a drain electrode connected with a datum node (VSS), and a source electrode and a grid electrode which are connected with the NMOS transistor (M1). The circuit also comprises a constant voltage circuit (21) which is connected with a grid electrode of the NMOS transistor (M1) and a source electrode of the PMOS transistor (QP), and the constant voltage circuit generates constant voltage (VC) which is lower than difference of withstand voltage between the grid electrode and the source electrode and interpolar voltage of the grid electrode and the source electrode of the NMOS transistor (M1). |
