发明名称 CLOCK SYNCHRONIZATION METHOD FOR MULTIPLE CLOCK DOMAINS, LINE CARD, AND ETHERNET DEVICE
摘要 The present invention discloses a clock synchronization method in a multi-clock domain, a line card, and an Ethernet device. The method includes: acquiring, by a sending line card, M clock frequency differences that are determined by a receiving line card and that are of M uplink interfaces corresponding to M downlink interfaces on the sending line card, where the M uplink interfaces are uplink interfaces on the receiving line card, and M is a positive integer; and adjusting, by the sending line card by using each clock frequency difference of the M clock frequency differences of the M uplink interfaces and based on a correspondence between the M downlink interfaces and the M uplink interfaces, a transmit clock of an interface corresponding to the clock frequency difference.
申请公布号 EP3076572(A4) 申请公布日期 2016.10.26
申请号 EP20130900079 申请日期 2013.12.24
申请人 HUAWEI TECHNOLOGIES CO., LTD. 发明人 LIU, FAN;LIN, LIANKUI;LV, XIN
分类号 H04J3/06 主分类号 H04J3/06
代理机构 代理人
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