发明名称 SELF-ALIGNED STRUCTURES AND METHODS FOR ASYMMETRIC GAN TRANSISTORS&ENHANCEMENT MODE OPERATION
摘要 Embodiments include high electron mobility transistors (HEMT). In embodiments, a gate electrode is spaced apart by different distances from a source and drain semiconductor region to provide high breakdown voltage and low on-state resistance. In embodiments, self-alignment techniques are applied to form a dielectric liner in trenches and over an intervening mandrel to independently define a gate length, gate-source length, and gate-drain length with a single masking operation. In embodiments, III-N HEMTs include fluorine doped semiconductor barrier layers for threshold voltage tuning and/or enhancement mode operation.
申请公布号 EP2901484(A4) 申请公布日期 2016.10.12
申请号 EP20130841467 申请日期 2013.06.12
申请人 INTEL CORPORATION 发明人 DASGUPTA, SANSAPTAK;THEN, HAN WUI;RADOSAVLJEVIC, MARKO;MUKHERJEE, NILOY;GOEL, NITI;KABEHIE, SANAZ;SUNG, SEUNG HOON;PILLARISETTY, RAVI;CHAU, ROBERT S.
分类号 H01L29/778;H01L21/223;H01L21/265;H01L21/311;H01L21/336;H01L29/08;H01L29/20;H01L29/207;H01L29/423 主分类号 H01L29/778
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