IMAGE LAG MITIGATION FOR BUFFERED DIRECT INJECTION READOUT WITH CURRENT MIRROR

摘要

A circuit having a buffered direct injection (BDI) module is provided for image lag mitigation. The BDI module includes an optical detector coupled to a buffer. The buffer has a pixel amplifier which includes no more than two transistors. The BDI module includes a first current mirror coupled to the BDI module. The first current mirror generates a modulating current based on the output of the optical detector. The BDI module further includes a second current mirror coupled to the first current mirror. The second current mirror is configured to generate either an amplified or attenuated photocurrent operable to optimize an imaging time and scene brightness of the optical detector. The BDI module further includes a reset circuit, coupled to the second current mirror, and being configured to reset an integration capacitor which integrates an image signal based on the output of the optical detector.

主权项

1. A circuit, comprising: a buffered direct injection (BDI) module, the BDI module comprising:
an optical detector; a buffer connected to an output of the optical detector having a pixel amplifier, the pixel amplifier having no more than two transistors; a first current mirror, coupled to the BDI module, the first current mirror generating a modulating current based on the output of the optical detector; a second current mirror, coupled to the first current mirror, the second current mirror being configured to generate either an amplified or attenuated photocurrent operable to optimize an imaging time and scene brightness of the optical detector; and a reset circuit, coupled to the second current mirror, and being configured to reset an integration capacitor which integrates an image signal based on the output of the optical detector.