发明名称 DEVICE INCLUDING SINGLE WIRE INTERFACE AND DATA PROCESSING SYSTEM INCLUDING THE SAME
摘要 A master device communicates with a slave device through an asynchronous serial communications link. The master device includes a single pad configured to communicate a command frame including an address and a data frame including data with the slave device via a single wire; and a processing circuit configured to generate an oversampling clock signal from a clock signal, to perform a synchronization process for selecting one of a plurality of clock phases of the oversampling clock signal, and to perform a sampling process for sampling an each bit value included in the data frame transmitted from the slave device using a clock phase at the same position as the clock phase selected during the synchronization process.
申请公布号 US2016294544(A1) 申请公布日期 2016.10.06
申请号 US201615072470 申请日期 2016.03.17
申请人 Jang Ho Rang;Lee Suh Ho;Scherrer Tomas;Huh Jun Ho;Kim Chul Jin 发明人 Jang Ho Rang;Lee Suh Ho;Scherrer Tomas;Huh Jun Ho;Kim Chul Jin
分类号 H04L7/04;H04L7/00 主分类号 H04L7/04
代理机构 代理人
主权项 1. A master device which communicates with a slave device, the master device comprising: a single pad configured to communicate a command frame including an address and a data frame, the data frame including data, with the slave device via a single wire; and a processing circuit configured to generate an oversampling clock signal from a clock signal, to perform a synchronization process for selecting one of a plurality of clock phases of the oversampling clock signal, and to perform a sampling process for sampling an each bit value included in the data frame transmitted from the slave device using a clock phase at the same position as the clock phase selected during the synchronization process.
地址 Seoul KR