| 发明名称 |
STATIC RANDOM ACCESS MEMORY AND METHOD OF OPERATING THE SAME |
| 摘要 |
A static random access memory (SRAM) including at least a memory cell array, a first data line, a second data line, a third data line and a driver circuit. The first data line is electrically coupled with the memory cell array. The second data line is electrically coupled with the memory cell array. The driver circuit is electrically coupled with the first data line, the second data line and the third data line. The driver circuit includes a recovery circuit electrically coupled with the first data line, the second data line and the third data line. During a write operation of the SRAM, the recovery circuit is configured to pull a voltage level of the first data line to a first voltage level when the recovery circuit is enabled. |
| 申请公布号 |
US2016293248(A1) |
申请公布日期 |
2016.10.06 |
| 申请号 |
US201514696795 |
申请日期 |
2015.04.27 |
| 申请人 |
TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD. |
发明人 |
WU Wei-Cheng;LIN Kao-Cheng;CHAN Wei Min;CHEN Yen-Huei |
| 分类号 |
G11C11/419 |
主分类号 |
G11C11/419 |
| 代理机构 |
|
代理人 |
|
| 主权项 |
1. A static random access memory (SRAM) circuit comprising:
a memory cell array; a first data line electrically coupled with the memory cell array; a second data line electrically coupled with the memory cell array; a driver control signal line; a driver circuit electrically coupled with the first data line, the second data line, and the driver control signal line, wherein the driver circuit comprises:
a recovery circuit electrically coupled with the first data line, the second data line, and the driver control signal line,wherein the recovery circuit is configured to be enabled or disabled responsive to a driver control signal on the driver control signal line, and to pull a voltage level of the first data line or a voltage level of the second data line toward a first voltage level when the recovery circuit is enabled during a write operation of the SRAM. |
| 地址 |
Hsinchu TW |
