GATE DRIVER AND DISPLAY DEVICE INCLUDING THE SAME

摘要

A gate driver includes a plurality of stage circuits to output a clock signal from the outside as gate signals. A jth stage circuit includes an input unit to charge a first node at an initial voltage when a first input signal is input to a first input terminal, a buffer unit to output the clock signal as a gate signal to an output terminal when the initial voltage is supplied to the first node, a holding unit to maintain the first node at a reset power source level when the clock signal is supplied to the holding unit, and an inverter unit to supply the clock signal or the reset power source to the holding unit. The input unit maintains the first node at a second input signal input voltage to a second input terminal when a third input signal is input to a third input terminal.

主权项

1. A gate driver comprising a plurality of stage circuits configured to output a clock signal input from the outside as gate signals,
wherein a jth (j is a natural number greater than 2) stage circuit of the stage circuits comprises: an input unit configured to charge a first node at a level of an initial voltage when a first input signal is input to a first input terminal; a buffer unit configured to output the clock signal as a gate signal to an output terminal when the initial voltage is supplied to the first node; a holding unit configured to maintain the first node at a level of a reset power source when the clock signal is supplied to the holding unit; and an inverter unit configured to supply the clock signal or the reset power source to the holding unit when the clock signal or the reset power source is supplied to the inverter unit, and wherein the input unit is configured to maintain the first node at a voltage level of a second input signal input to a second input terminal when a third input signal is input to a third input terminal.