发明名称 PHASE LOCK LOOP
摘要 PROBLEM TO BE SOLVED: To provide a phase lock loop capable of reducing a circuit area with the reduction of an oscillation frequency error.SOLUTION: The phase lock loop includes: a first current source which outputs a current from a first output node; a drive current circuit which includes a first voltage node which becomes a voltage associated with a supplied current to output a drive current in association with the current supplied to the first voltage node from a drive current node; a current voltage conversion circuit which includes a second voltage node which becomes a voltage associated with a supplied current; and a first current switch circuit which makes conductive either one of between the first output node and the first voltage node and between the first output node and the second voltage node; and an oscillator to which the drive current is supplied and which generates an oscillation frequency being changed according to the magnitude of the drive current.SELECTED DRAWING: Figure 1
申请公布号 JP2016174199(A) 申请公布日期 2016.09.29
申请号 JP20150051970 申请日期 2015.03.16
申请人 TOSHIBA CORP 发明人 ITO TOMOHIKO
分类号 H03L7/099;H03K3/354;H03K5/00;H03K17/62 主分类号 H03L7/099
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