| 摘要 |
A silicon carbide vertical MOSFET includes an N-counter layer of a first conductivity type formed in a surface layer other than a second semiconductor layer base layer selectively formed in a low concentration layer on a surface of the substrate, a gate electrode layer formed through a gate insulating film in at least a portion of an exposed portion of a surface of a third semiconductor layer of a second conductivity type between a source region of the first conductivity type and the N-counter layer of the first conductivity type, and a source electrode in contact commonly with surfaces of the source region and the third semiconductor layer. Portions of the second conductivity type semiconductor layer are connected with each other in a region beneath the N-counter layer. |
