| 摘要 |
Provided is an operation method of a memory controller. The operation method includes: a first step of reading data stored in a semiconductor device using a soft read voltage; a second step of performing soft decision ECC decoding based on a first log likelihood ratio (LLR) value for the read data; and a third step of, if the soft decision ECC decoding based on the first LLR value fails, performing soft decision ECC decoding based on a second LLR value for the read data. The first and second LLR values are selected between a default LLR value and an update LLR value, and the update LLR value is generated based on the number of error bits and the number of non-error bits acquired through the soft decision ECC decoding for the data stored in the semiconductor memory device. |
