发明名称 RESISTIVE MEMORY ARCHITECTURE AND DEVICES
摘要 The present invention provides high-density two-terminal memory architecture(s) having performance gains of a two-terminal memory and a relatively low manufacturing cost. For example, in various embodiments, the two-terminal memory architecture(s) can be formed on a substrate, and include two-terminal memory cells formed in conductive layer recess structures of the memory architecture. In an embodiment, a conductive layer recess can be generated by horizontal etching along with vertically penetrating etching. In another embodiment, the conductive layer recess can be patterned for each conductive layer of the two-terminal architecture.
申请公布号 KR20160110012(A) 申请公布日期 2016.09.21
申请号 KR20150104233 申请日期 2015.07.23
申请人 CROSSBAR, INC. 发明人 JO, SUNG HYUN
分类号 H01L27/115;H01L27/24 主分类号 H01L27/115
代理机构 代理人
主权项
地址