发明名称 論理回路の設計装置
摘要 PROBLEM TO BE SOLVED: To provide a device for designing a logic circuit in which safety, circuit scale, and an operation frequency are considered.SOLUTION: A device for designing a logic circuit corresponding to an input logical formula comprises: input means that inputs the number of registers; and determination means that determines insertion positions of registers for storing intermediate values as many as the number of registers separately from a register for storing an input value to the logic circuit and a register for storing an output value of the logic circuit. The determination means determines the insertion positions of the registers so that a difference in the number of logic elements between registers is equal to or smaller than a predetermined value.
申请公布号 JP5992809(B2) 申请公布日期 2016.09.14
申请号 JP20120263228 申请日期 2012.11.30
申请人 KDDI株式会社 发明人 福島 和英;清本 晋作;三宅 優
分类号 G06F17/50 主分类号 G06F17/50
代理机构 代理人
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